仿真显示状态机ascii
enum logic [3:0] {IDLE=4’d0,STEP1=4’d1,STEP2=4’d2} cur_sta,next_sta;
定义结构体
typedef struct packed{
reg [5:0] a ;
reg [5:0] b ;
} spi_cmd ;
logic [3:0] [$bits(spi_cmd )-1:0] data ;
spi_cmd [3:0] data ;
system verilog常用语法
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2022-08-01
enum logic [3:0] {IDLE=4’d0,STEP1=4’d1,STEP2=4’d2} cur_sta,next_sta;
typedef struct packed{
reg [5:0] a ;
reg [5:0] b ;
} spi_cmd ;
logic [3:0] [$bits(spi_cmd )-1:0] data ;
spi_cmd [3:0] data ;
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